Japanese Unexamined Patent Publication No. 2001-137991 (hereinafter referred to as “Patent Document 1”) discloses a nonvolatile semiconductor memory having sectors in a plurality of areas and capable of erasing stored data in a group. The nonvolatile semiconductor memory has a high voltage generating circuit for generating high voltages to be used for erasing data and a plurality of transistors connected between the high voltage generating circuit and the sectors in the plurality of areas. At the time of erasing a group of data together, a plurality of transistors are operated with a constant current to control the current passed to the sectors in the plurality of areas. Consequently, even if a defective sector exists in the sectors, current to be passed is regulated to a constant value so that high voltage necessary for erasure can be maintained and batch erase can be performed.
In a semiconductor storage device as disclosed in Japanese Unexamined Patent Publication No. H8-106796 (hereinafter referred to as “Patent Document 2”), a “select” signal is always output to blocks which are not switched to redundant blocks by switching means among a plurality of blocks, and a “non-select” signal is output to a defective block switched to a redundant block in response to an input signal of batch writing/batch erasing all blocks in a test mode. The semiconductor storage device has a block selecting circuit for inhibiting application of a batch write/erase voltage to a defective block in a block batch write/erase mode. With this configuration, high voltage is not applied to a defective block and a voltage value does not drop due to current leakage.